Memory Circuit Design Engineer

Job Description

<p>Memory Circuit Design Engineer</p><p>5 days onsite at Ottawa, Ontario</p><p>15 positions</p><p>Contract and FTE - Open</p><p><br></p><p><b>Look for Using CADENCE SPECTRE (tool used for circuit design)</b></p><p><br></p><p>Qualification Required:</p><p> </p><p>Typically requires minimum of 2-13+ years of experience in Memory Design with mainstream SRAM tools</p><p>Bachelors / master's degree in E&E and E&C</p><p>Strong communication and teamwork skills</p><p><br></p><p>Roles And Responsibilities</p><p> </p><p>Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis and Monte Carlo Simulations.</p><p>Exposure to full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation.</p><p>Good experience in design verification: Sense amplifier analysis, self-time analysis and marginality analysis.</p><p>Good exposure to validation of the characterized data.</p><p>Strong knowledge of physical implementation impact on circuit performance.</p><p>Experience with the most advanced technology nodes up to 28nm and below.</p>